The present subject matter generally relates to a method for manufacturing improved milled single layer capacitors and the single layer capacitors themselves. More specifically, the present subject matter relates to a device and a method of manufacturing such a device in which perfect registration between the capacitor plates within a capacitor is assured. In the same context, the present subject matter relates most directly to a device and a method for making such a device in which perfect registration of the capacitor plates in a single layer capacitor is assured using a tumbling process.
With the ever-increasing demand for additional features and the expectations of longer battery life in present day electronic devices, circuit and component designers have responded with smaller component designs requiring less voltage. The result has been not only an increase in device operation speed or operating frequency, but also an increase in package density. In addition to integrated circuitry, the use of multilayered printed circuits has aided in reducing the space requirements of advanced circuitry for portable electronic devices.
Some designers, however, have continued to look for more straightforward approaches to the problem of reducing the space demands and power-hungry reputations of some of today""s component designs. They have continued to try to optimize the performance characteristics of the components themselves even while the devices are shrinking in size. The present subject matter corresponds to such an improved single layer capacitor and a method of improving its performance characteristics.
Component manufacturers often utilize abrasive chemicals, vibrations, ultrasonics, thermal exposure and even manual techniques to xe2x80x9ccleanxe2x80x9d their manufactured parts of the residuals of the manufacturing processes. For example, often times metals used for the terminations are exposed to chemical treatments to remove any oxidation that has built up during the pressing and sintering process. After dicing, components are often subjected to thermal treatments or Harperizing to remove burrs, which may hinder both the proper handling and installation of the components. Harperizing is a process in which the components are tumbled in a barrel with an aqueous abrasive media.
While useful for their purpose, these processes fail to address in any substantive way the idea of improving the performance characteristics of the underlying electronic component. Such processes also fail to provide a reliable mechanism to control the size of the component when the processes are completed. It is, therefore, desirable to provide an improved method for ensuring both perfect registration of the capacitor plates and a given size are obtained in a single layer capacitor utilizing a tumbling process in which the performance characteristics are improved.
The present subject matter recognizes and addresses various of the foregoing limitations and drawbacks, and others, concerning post-manufacturing processes for removing non-operational manufacturing residuals from an electronic component. Therefore, the presently disclosed technology provides for a device and method for making such a device in which perfect registration of the capacitor plates in a single layer capacitor is assured utilizing a tumbling process.
In accordance with the present technology, use herein of the term xe2x80x9cperfect registrationxe2x80x9d corresponds to substantially complete alignment of capacitor plates. Insubstantial differences in plate registration as recognized by engineering tolerance levels may still exist in some embodiments of the present subject matter while still falling within the spirit and scope of the disclosed technology. Similarly, reference to elimination of fringe capacitance and fringe borders corresponds to substantially complete elimination of such undesirable performance characteristics as within negligible tolerance discrepancies.
It is, therefore, a principle object of the subject technology to provide a single layer capacitor element and a method of manufacturing such a capacitor. More specifically, it is an object of the present technology to provide an improved single layer capacitor and a method for making the same in which the fringe capacitance and fringe borders no longer introduce either functional or handling/mounting problems. In the same context, it is yet another principle object of the present technology to provide an improved single layer capacitor and a method of making the same in which the capacitor is square.
It is an additional principle object of the present subject matter to provide a ceramic capacitive device with gold terminations and a method of making the same in which there exists perfect registration between the electrode plates. In such context, it is still another aspect of the present subject matter to provide a ceramic capacitive device and a method of making the same in which the fringe capacitance and the fringe border introduce no functional or handling/mounting problems.
It is still another principle object of the present subject matter to provide a single layer capacitive array and a method of making the same in which there exists perfect registration between the electrode plates. More specifically, it is a principle object of the presently disclosed technology to provide a ceramic single layer capacitive array with gold termination and a method of making the same in which there exists improved performance characteristics due to a post-formation process.
Additional objects and advantages of the disclosed technology are set forth in, or will be apparent to those of ordinary skill in the art from, the detailed description as follows. Also, it should be further appreciated that modifications and variations to the specifically illustrated and discussed features and materials hereof may be practiced in various embodiments and uses of this technology without departing from the spirit and scope thereof, by virtue of present reference thereto. Such variations may include, but are not limited to, substitutions of the equivalent means, features, and materials for those shown or discussed, and the functional or positional reversal of various parts, steps, features, or the like.
Still further, it is to be understood that different embodiments, as well as different presently preferred embodiments, of this technology may include various combinations or configurations of presently disclosed method steps, features, elements, or their equivalents (including combinations of method steps, features or configurations thereof not expressly shown in the figures or stated in the detailed description).
These and other steps, features, aspects and advantages of the present subject matter will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate at least one embodiment of the present subject matter and, together with the description, serve to explain the principles of the disclosed technology. In one exemplary embodiment, a single layer capacitor template is formed by sputtering a single layer of fired ceramic over an entire surface with gold terminations as would be known by one of ordinary skill in the art. The template is then diced into individual single layer capacitive devices of a desired size and shape. The single layer capacitive devices are then tumbled to remove all edges and corners thus leaving a uniform border around the entire part.
Such a manufacturing process results in a capacitive device in which the terminations are in perfect registration and there exists no fringe capacitance or significant border problem. Further, the tumbling process inflicts less damage to the components than typical xe2x80x9ccleaning methodsxe2x80x9d, including conventional Harperizing. The result is a xe2x80x9ccleanerxe2x80x9d part and control of the fringe border. In particular, the fringe border is controllable from about 0.5 mils to about 2.0 mils (about 0.0005 to 0.0020 inches). Finally, the improved registration results in an improved volumetric efficiency of the component.
In an alternative exemplary embodiment of the present subject matter, a square single layer capacitor template is formed as above with terminations. The template is then diced into individual single layer capacitive devices of a desired size. These devices are then tumbled to remove all edges and corners thus leaving a uniform border around the entire part. As before the capacitive device has improved performance characteristics similar to those specified above.
In yet another alternative exemplary embodiment of the presently disclosed technology, a single layer capacitive template is formed as above with terminations. The template is diced into a single layer capacitive array of a desired size and shape. These devices are then tumbled to remove all edges and corners thus leaving a uniform border around and between the individual capacitors within the array.
Such a process results in a capacitive array in which the terminations of each of the individual capacitors are in perfect registration and there exists no fringe capacitance or significant border problem. Further, the tumbling process inflicts less damage to the components than typical xe2x80x9ccleaning methodsxe2x80x9d, including conventional Harperizing. The result is a xe2x80x9ccleanerxe2x80x9d part and control of the fringe border. In particular, the fringe border is controllable from about 0.5 mils to about 2.0 mils (about 0.0005 to 0.0020 inches). Finally, the improved registration results in an improved volumetric efficiency of the component and the rounded edges allow for greater adhesion to the epoxy used to mount the component array.